Please note that NANDFlashSim project has been started as an open source project. Any feedback or update version of NANDFlashSim is really appreciated. Please visit our Google group or join mailing list, nandflashsim@googlegroups.com . In addition, if you decide to use NANDFlashSim in your own research, please cite our MSST paper. For convenience, here is the BibTeX information.
Download
The initial version (Ver. 0.1) of NANDFlashSim has been released. The source code can be download from below github repository:
git@github.com:mj-nvram/NFS.git
Or, just type following text in your command line:
git clone git@github.com:mj-nvram/NFS.git
NOTE: if you are not familiar with git cloning, ssh, or github, please see the following post, which has been extracted by the conversation with Intel Lab.: https://groups.google.com/forum/?fromgroups=#!topic/nandflashsim/4EPUgw5oGB8
License
NANDFlashSim has been published as an open source project. This program is free software: you can redistribute it and/or modify it under the terms of the GNU Lesser General Public License as published by the Free Software Foundation.
NANDFlashSim is distributed in the hope that it will be useful to closely study NAND flash memory and be a research vehicle for flash controller/firmware designers, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. Again, please see the GNU Lesser General Public License for more details.
Notification
Future Plans
Please note that NANDFlashSim is originally designed and implemented as a library, which is a part of the cycle-level simulation models -- Hardware/software co-simulation model for exascale of LBNL (CoDEx) and a many chip-based SSD platform of CAMELab (Flashwood). Even though we provide a sample system with NANDFlashSim, such sample system doesn't contain system clock itself. we plan to provide more accurate sample system and diverse workloads for your convenience.
In addition, we are constructing a visualization tool for better and easier analyzing log data, which are an output of NANDFlashSim. However, it would be greatly appreciated if you have any contribution for NANDFlashSim future works (like the visualization tool, elaborate sample system, code examples, or new interface suggestion). Please let us know if you have any update of NANDFlashSim via our mailing list.
